Analysis of iSLIP scheduling algorithm for input-queuing switches

Authors:
Mitko Gospodinov;Evgeniya Gospodinova
Affiliations:
Bulgarian Academy of Sciences;Bulgarian Academy of Sciences
Venue:
CompSysTech '04 Proceedings of the 5th international conference on Computer systems and technologies
Year:
2004

Citing 2
Cited 1

Tiny Tera: A Packet Switch Core

IEEE Micro
Achieving 100% throughput in an input-queued switch

INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1

An immune clonal selection scheduling algorithm for input-queued switches

SEAL'06 Proceedings of the 6th international conference on Simulated Evolution And Learning

Quantified Score

Hi-index	0.00

Visualization

Abstract

The paper presents one of the most up-to-date iSLIP (iterative round robin matching with slip) algorithms for configuration and scheduling input-queuing switch fabrics. The aim of the paper is research the performance of the algorithm regarding cell delay in the queues depending on the load for input-queuing switches with 4, 8, 16 and 32 ports. The advantage of the algorithm is achieving almost 100% throughput as result of de-synchronization of output arbiters playing important role in providing low latency.