Partitioning of processor arrays: a piecewise regular approach
Integration, the VLSI Journal - Special issue on algorithms and architectures
Parametric Analysis of Polyhedral Iteration Spaces
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Compaan: deriving process networks from Matlab for embedded signal processing architectures
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Principles of Concurrent Programming
Principles of Concurrent Programming
System level design with spade: an M-JPEG case study
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Memory optimization by counting points in integer transformations of parametric polytopes
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Integer affine transformations of parametric ℤ-polytopes and applications to loop nest optimization
ACM Transactions on Architecture and Code Optimization (TACO)
An FPGA-based multi-core approach for pipelining computing stages
Proceedings of the 28th Annual ACM Symposium on Applied Computing
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The Compaan compiler framework automates the transformation of DSP applications written in Matlab into Kahn Process Networks (KPNs). These KPNs express the signal processing applications in a parallel distributed way making them more suitable for mapping onto parallel architectures. A simple instance of a generated KPN by Compaan is a Producer process that communicates with a Consumer process via a FIFO buffer, with the Consumer reading data from the FIFO using a blocking read. When the sequence of producing data is different from the sequence of consuming data, a simple FIFO is not sufficient to implement the communication. For such case, extra storage and control are needed at the consumer side. This paper presents a compile approach that determines whether a FIFO buffer is sufficient for every Producer/Consumer pair of a Compaan-generated KPN. When additional memory is required, we provide an address generation mechanism to perform the reordering and furthermore give a lower bound on the amount of memory needed to perform the reordering. The presented approach is based on the Ehrhart theory