An Application Analysis Framework For Polymorphic Chip Multiprocessors

  • Authors:
  • Ayodele Thomas;Kunle Olukotun

  • Affiliations:
  • Stanford University;Stanford University

  • Venue:
  • IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
  • Year:
  • 2005

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Abstract

The SAPIENT parallel analysis framework facilitates the efficient transformation of sequential applications into multilevel parallel applications that can be executed on polymorphic chip multiprocessor architectures. We demonstrate how application characteristics are used to detect thread and data level parallelism in sequential applications and estimate parallel performance. We further demonstrate how SAPIENT determines the combination of application parallelism and polymorphic architecture configuration that maximizes performance. As an example, we present a detailed analysis of parallelism for an MPEG-2 decoder. We further summarize results for six other multimedia applications, identifying the presence of data and thread level parallelism, evaluating performance, and suggesting architecture configurations for each.