Traffic Temporal Analysis for Reconfigurable Interconnects in Shared-Memory Systems

  • Authors:
  • W. Heirman;J. Dambre;J. Van Campenhout;C. Debaes;H. Thienpont

  • Affiliations:
  • Universiteit Gent, ELIS, Belgium;Universiteit Gent, ELIS, Belgium;Universiteit Gent, ELIS, Belgium;Vrije Universiteit Brussel, TONA, Belgium;Vrije Universiteit Brussel, TONA, Belgium

  • Venue:
  • IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
  • Year:
  • 2005

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Abstract

New advances in reconfigurable optical interconnect technologies will allow the fabrication of cheap, fast and run-time adaptable networks for connecting processors and memory modules in large shared-memory multiprocessor machines. Since, in some technologies, the switching times of these components are high compared to the memory access time, reconfiguration can only take place on a time scale significantly above individual memory accesses. In this paper, we present preliminary results of our investigation into the exploitability of the space and time locality of address streams by a reconfigurable network.