Challenges and opportunities in broadband and wireless communication designs
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Partially Reconfigurable Cores for Xilinx Virtex
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Reconfigurable Hardware in Wearable Computing Nodes
ISWC '02 Proceedings of the 6th IEEE International Symposium on Wearable Computers
An Application of Functional Decomposition in ROM-Based FSM Implementation in FPGA Devices
DSD '03 Proceedings of the Euromicro Symposium on Digital Systems Design
Cost-Efficient Implementation of Adaptive Finite State Machines
DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
Hi-index | 0.00 |
This paper concerns the realization of an adaptable Protocol Processing Unit (PPU) targeting reconfigurable SoCs in mobile communication applications. The PPU is based on our design technique for dense-coded programmable Finite State Machines. This approach reduces programming costs by combining memory-based function generators with reconfigurable logic. Furthermore, we added custom modules that implement application-specific logic and arithmetic operations to achieve proper results.