On equivalence checking and logic synthesis of circuits with a common specification

Authors:
Eugene Goldberg
Affiliations:
Cadence Berkeley Labs, Berkeley, CA
Venue:
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Year:
2005

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Abstract

In this paper we develop a theory of equivalence checking (EC) and logic synthesis of circuits with a common specification (CS). We show that two combinational circuits N1 N2 have a CS iff they can be partitioned into subcircuits that are connected "in the same way" and are toggle equivalent. This fact allows one to represent a specification of a circuit implicitly as a partitioning into subcircuits. We give an efficient procedure for checking if circuits N1, N2 have the same predefined specification. As a "by-product", this procedure performs EC of N1 and N2. We show how, given a circuit N1 with a predefined specification, one can efficiently build a circuit N2 satisfying the same specification. We give experimental evidence that EC of N1 N2 is hard if their CS is unknown.