A Memory Design in QCAs using the SQUARES Formalism
GLS '99 Proceedings of the Ninth Great Lakes Symposium on VLSI
Proceedings of the conference on Design, automation and test in Europe: Proceedings
On the Tolerance to Manufacturing Defects in Molecular QCA Tiles for Processing-by-wire
Journal of Electronic Testing: Theory and Applications
A shift-register-based QCA memory architecture
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Design and simulation of a QCA 2 to 1 multiplexer
ICCOMP'08 Proceedings of the 12th WSEAS international conference on Computers
An information-theoretic analysis of quantum-dot cellular automata for defect tolerance
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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Quantum-dot Cellula Automata (QCA) has been widely advocated as a new device architecture fo nano technology. QCA systems require extremely low power together with the potential for high density and regularity. These features make QCA an attractive technology for manufacturing memories in which the paradigm of memory-in-motion can be fully exploited. This paper proposes a novel serial memory architecture for QCA implementation. This architecture is based on utilizing new building blocks (referred to as tiles) in the storage and input/output circuitry of the memory. The QCA paradigm of memory-in-motion is accomplished using a novel arrangement in the storage loop and timing/clocking; a three-zone memory tile is proposed by which information is moved across a concatenation of tiles by utilizing a two-level clocking mechanism. Clocking zones are shared between memory cells and the length of the QCA line in a clocking zone is independent of word size. This results in a substantial eduction in clocking zones compared with previous serial memories.