Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Manipulation and characterization of molecular scale components
Proceedings of the 40th annual Design Automation Conference
A Memory Design in QCAs using the SQUARES Formalism
GLS '99 Proceedings of the Ninth Great Lakes Symposium on VLSI
Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory
ISVLSI '03 Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
Tile-based design of a serial memory in QCA
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Design of a QCA Memory with Parallel Read/Serial Write
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
QCADesigner: a rapid design and Simulation tool for quantum-dot cellular automata
IEEE Transactions on Nanotechnology
High-resolution electron beam lithography and DNA nano-patterning for molecular QCA
IEEE Transactions on Nanotechnology
A line-based parallel memory for QCA implementation
IEEE Transactions on Nanotechnology
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A quantum-dot cellular automata (QCA) design of an nxm-bit, shift-register-based memory architecture is presented. The architecture maintains data at a stable conformation, which is contrary to traditional data in-motion concept for QCA architectures. The memory architecture is based on an existing dual-phase-synchronized, line-based, one-bit QCA memory cell building block that provides size and latency improvements over other known one-bit memory cells through its novel clocking scheme. Read/write latencies up to ∼2X lower than the existing tile-based architecture with three-phase, line-based memory cells are obtained. Simulations with QCADesigner and HDLQ are performed on a sample 4x8 bit memory architecture implementation.