Proceedings of the 41st annual Design Automation Conference
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Low-power FinFET circuit synthesis using multiple supply and threshold voltages
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and performance by dynamically shifting the threshold voltage during operation. A small number of simple circuits are analyzed and it is demonstrated that subthreshold power can be reduced by a factor in excess of 103 for these examples.