Reduced-order modelling of linear time-varying systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Projection frameworks for model reduction of weakly nonlinear systems
Proceedings of the 37th Annual Design Automation Conference
Krylov-subspace methods for reduced-order modeling in circuit simulation
Journal of Computational and Applied Mathematics - Special issue on numerical analysis 2000 Vol. III: linear algebra
Neural Networks for RF and Microwave Design (Book + Neuromodeler Disk)
Neural Networks for RF and Microwave Design (Book + Neuromodeler Disk)
NORM: compact model order reduction of weakly nonlinear systems
Proceedings of the 40th annual Design Automation Conference
Piecewise polynomial nonlinear model reduction
Proceedings of the 40th annual Design Automation Conference
Proceedings of the 40th annual Design Automation Conference
Design and Analysis of Low-Voltage Current-Mode Logic Buffers
ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
Algorithmic Macromodelling Methods for Mixed-Signal Systems
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
An Essentially Non-Oscillatory (ENO) high-order accurate Adaptive table model for device modeling
Proceedings of the 41st annual Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Faster, parametric trajectory-based macromodels via localized linear reductions
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A nonlinear cell macromodel for digital applications
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Stabilizing schemes for piecewise-linear reduced order models via projection and weighting functions
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A "true" electrical cell model for timing, noise, and power grid verification
Proceedings of the 45th annual Design Automation Conference
Manifold construction and parameterization for nonlinear manifold-based model reduction
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Journal of Electronic Testing: Theory and Applications
Mathematics and Computers in Simulation
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We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonlinear macromodels of such drivers are essential for fast signal-integrity and timing analysis in high-speed digital design. Unlike traditional black-box modelling techniques, our approach extracts nonlinear macromodels of digital drivers automatically from SPICE-level descriptions. Thus it can naturally capture transistor-level nonlinearities in the macromodels, resulting in far more accurate signal integrity analysis, while retaining significant speedups. We demonstrate the technique by automatically extracting macromodels for two typical digital drivers. Using the macromodel, we obtain about 8x speedup in average with excellent accuracy in capturing different loading effects, crosstalk, simultaneous switching noise (SSN), etc.