Generic global placement and floorplanning
DAC '98 Proceedings of the 35th annual Design Automation Conference
A force-directed macro-cell placer
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2004 international symposium on Physical design
Combinatorial techniques for mixed-size placement
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Engineering details of a stable force-directed placer
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Novel pin assignment algorithms for components with very high pin counts
Proceedings of the conference on Design, automation and test in Europe
Pin assignment using stochastic local search constraint programming
CP'09 Proceedings of the 15th international conference on Principles and practice of constraint programming
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Pins serve as both the logical and physical interface between two levels in a hierarchical flow. Pin assignment is the placement of pins on the boundary of a chip or macro. Proper pin placement has a large influence on wire length. Experiments indicate a spread in wire length up to over 20%. To address the pin assignment problem, a modification to the well-known and widely used quadratic placement is introduced. This modification allows for the integration between pin assignment and global placement. Wire length within macros is minimized, while top-level considerations such as the relative position of macro and clusters of cells are taken into account in the form of a side assignment. As indicated by experimental results, integration is promising. More research is necessary to fully exploit the ideas in this paper, and assess the practical impact of the approach.