Performance-driven placement of cell based IC's
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Analytical placement: A linear or a quadratic objective function?
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A loosely coupled parallel algorithm for standard cell placement
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Timing driven placement for large standard cell circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Efficient and effective placement for very large circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Partitioning-based standard-cell global placement with an exact objective
Proceedings of the 1997 international symposium on Physical design
Proud: a fast sea-of-gates placement algorithm
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Chip layout optimization using critical path weighting
DAC '84 Proceedings of the 21st Design Automation Conference
Efficient and effective placement for very large circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On the behavior of congestion minimization during placement
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Standard cell placement for even on-chip thermal distribution
ISPD '99 Proceedings of the 1999 international symposium on Physical design
A sensitivity based placer for standard cells
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
ISPD '00 Proceedings of the 2000 international symposium on Physical design
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
Unifying behavioral synthesis and physical design
Proceedings of the 37th Annual Design Automation Conference
Analytical minimization of half-perimeter wirelength
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Modeling and minimization of routing congestion
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Global objectives for standard cell placement
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
A performance-driven standard-cell placer based on a modified force-directed algorithm
Proceedings of the 2001 international symposium on Physical design
Reporting of standard cell placement results
Proceedings of the 2001 international symposium on Physical design
Improved cut sequences for partitioning based placement
Proceedings of the 38th annual Design Automation Conference
Timing driven placement using physical net constraints
Proceedings of the 38th annual Design Automation Conference
An effective congestion driven placement framework
Proceedings of the 2002 international symposium on Physical design
Min-max placement for large-scale timing optimization
Proceedings of the 2002 international symposium on Physical design
Net criticality revisited: an effective method to improve timing in physical design
Proceedings of the 2002 international symposium on Physical design
FAR: fixed-points addition & relaxation based placement
Proceedings of the 2002 international symposium on Physical design
Proceedings of the 39th annual Design Automation Conference
Logical and physical design: a flow perspective
Logic Synthesis and Verification
Mongrel: hybrid techniques for standard cell placement
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Multilevel optimization for large-scale circuit placement
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A force-directed macro-cell placer
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Effective partition-driven placement with simultaneous level processing and global net views
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Dragon2000: standard-cell placement tool for large industry circuits
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Addressing the timing closure problem by integrating logic optimization and placement
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
The scaling challenge: can correct-by-construction design help?
Proceedings of the 2003 international symposium on Physical design
Timing driven force directed placement with physical net constraints
Proceedings of the 2003 international symposium on Physical design
Optimality, scalability and stability study of partitioning and placement algorithms
Proceedings of the 2003 international symposium on Physical design
Benchmarking for large-scale placement and beyond
Proceedings of the 2003 international symposium on Physical design
Design topology aware physical metrics for placement analysis
Proceedings of the 13th ACM Great Lakes symposium on VLSI
A novel net weighting algorithm for timing-driven placement
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Free space management for cut-based placement
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Force directed mongrel with physical net constraints
Proceedings of the 40th annual Design Automation Conference
An algebraic multigrid solver for analytical placement with layout based clustering
Proceedings of the 40th annual Design Automation Conference
Wire length prediction based clustering and its application in placement
Proceedings of the 40th annual Design Automation Conference
Gravity: Fast placement for 3-D VLSI
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Net Clustering Based Macrocell Placement
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Boosting: Min-Cut Placement with Improved Signal Delay
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Placement Using a Localization Probability Model (LPM)
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Sensitivity guided net weighting for placement driven synthesis
Proceedings of the 2004 international symposium on Physical design
Implementation and extensibility of an analytic placer
Proceedings of the 2004 international symposium on Physical design
Proceedings of the 2004 international symposium on Physical design
Recursive bisection based mixed block placement
Proceedings of the 2004 international symposium on Physical design
Sensitivity guided net weighting for placement driven synthesis
Proceedings of the 2004 international symposium on Physical design
A study of netlist structure and placement efficiency
Proceedings of the 2004 international symposium on Physical design
A predictive distributed congestion metric and its application to technology mapping
Proceedings of the 2004 international symposium on Physical design
Constructive benchmarking for placement
Proceedings of the 14th ACM Great Lakes symposium on VLSI
On legalization of row-based placements
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Large-scale placement by grid-warping
Proceedings of the 41st annual Design Automation Conference
Modeling repeaters explicitly within analytical placement
Proceedings of the 41st annual Design Automation Conference
Quadratic placement using an improved timing model
Proceedings of the 41st annual Design Automation Conference
Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
An Enhanced Multilevel Algorithm for Circuit Placement
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Fractional Cut: Improved Recursive Bisection Placement
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Incremental Placement for Timing Optimization
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Optimality and Stability Study of Timing-Driven Placement Algorithms
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Large-Scale Circuit Placement: Gap and Promise
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Temperature-aware global placement
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Combinatorial techniques for mixed-size placement
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Skew-programmable clock design for FPGA and skew-aware placement
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
An Improved Multi-Level Framework for Force-Directed Placement
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Multilevel generalized force-directed method for circuit placement
Proceedings of the 2005 international symposium on Physical design
Unified quadratic programming approach for mixed mode placement
Proceedings of the 2005 international symposium on Physical design
Evaluation of placer suboptimality via zero-change netlist transformations
Proceedings of the 2005 international symposium on Physical design
The ISPD2005 placement contest and benchmark suite
Proceedings of the 2005 international symposium on Physical design
mPL6: a robust multilevel mixed-size placement engine
Proceedings of the 2005 international symposium on Physical design
Recursive bisection placement: feng shui 5.0 implementation details
Proceedings of the 2005 international symposium on Physical design
NTUplace: a ratio partitioning based placement algorithm for large-scale mixed-size designs
Proceedings of the 2005 international symposium on Physical design
mFAR: fixed-points-addition-based VLSI placement algorithm
Proceedings of the 2005 international symposium on Physical design
Kraftwerk: a versatile placement approach
Proceedings of the 2005 international symposium on Physical design
A study of tighter lower bounds in LP relaxation based placement
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Net weighting to reduce repeater counts during placement
Proceedings of the 42nd annual Design Automation Conference
Diffusion-based placement migration
Proceedings of the 42nd annual Design Automation Conference
Timing-driven placement by grid-warping
Proceedings of the 42nd annual Design Automation Conference
Faster and better global placement by a new transportation algorithm
Proceedings of the 42nd annual Design Automation Conference
Towards Integration of Quadratic Placement and Pin Assignment
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Supply Voltage Degradation Aware Analytical Placement
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
True crosstalk aware incremental placement with noise map
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A new incremental placement algorithm and its application to congestion-aware divisor extraction
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
An analytic placer for mixed-size placement and timing-driven placement
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Unification of partitioning, placement and floorplanning
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Multilevel expansion-based VLSI placement with blockages
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Engineering details of a stable force-directed placer
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A robust detailed placement for mixed-size IC designs
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
FastPlace 2.0: an efficient analytical placer for mixed-mode designs
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Simultaneous block and I/O buffer floorplanning for flip-chip design
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Congestion driven incremental placement algorithm for standard cell layout
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A path-based timing-driven quadratic placement algorithm
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
On-chip thermal gradient analysis and temperature flattening for SoC design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
On structure and suboptimality in placement
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Optimal placement by branch-and-price
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
An LP-based methodology for improved timing-driven placement
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Effective linear programming based placement methods
Proceedings of the 2006 international symposium on Physical design
mPL6: enhanced multilevel mixed-size placement
Proceedings of the 2006 international symposium on Physical design
An efficient and effective detailed placement algorithm
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Architecture and details of a high quality, large-scale analytical placer
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Mixed-size placement via line search
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A hybrid linear equation solver and its application in quadratic placement
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Integrated placement and skew optimization for rotary clocking
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Defect tolerance at the end of the roadmap
Nano, quantum and molecular computing
Efficient thermal-oriented 3D floorplanning and thermal via planning for two-stacked-die integration
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Architecture-aware FPGA placement using metric embedding
Proceedings of the 43rd annual Design Automation Conference
A new LP based incremental timing driven placement for high performance designs
Proceedings of the 43rd annual Design Automation Conference
Design and verification of high-speed VLSI physical design
Journal of Computer Science and Technology
New timing and routability driven placement algorithms for FPGA synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
X-architecture placement based on effective wire models
Proceedings of the 2007 international symposium on Physical design
Mixed-size placement with fixed macrocells using grid-warping
Proceedings of the 2007 international symposium on Physical design
New theoretical results on quadratic placement
Integration, the VLSI Journal
Fast and robust quadratic placement combined with an exact linear net model
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A high-quality mixed-size analytical placer considering preplaced blocks and density constraints
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Timing-driven placement for heterogeneous field programmable gate array
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
FastRoute: a step to integrate global routing into placement
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Integrated Computer-Aided Engineering
Yield-aware placement optimization
Proceedings of the conference on Design, automation and test in Europe
RQL: global placement via relaxed quadratic spreading and linearization
Proceedings of the 44th annual Design Automation Conference
Integrated placement and skew optimization for rotary clocking
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The coming of age of physical synthesis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Architecture-specific packing for virtex-5 FPGAs
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Elastic Flow in an Application Specific Network-on-Chip
Electronic Notes in Theoretical Computer Science (ENTCS)
Metal-density driven placement for cmp variation and routability
Proceedings of the 2008 international symposium on Physical design
Highly efficient gradient computation for density-constrained analytical placement methods
Proceedings of the 2008 international symposium on Physical design
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
DPlace2.0: a stable and efficient analytical placement based on diffusion
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Low power clock buffer planning methodology in F-D placement for large scale circuit design
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Criticality history guided FPGA placement algorithm for timing optimization
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Proceedings of the 45th annual Design Automation Conference
Lens aberration aware placement for timing yield
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Three-dimensional Integrated Circuit Design
Three-dimensional Integrated Circuit Design
A power-aware algorithm for the design of reconfigurable hardware during high level placement
International Journal of Knowledge-based and Intelligent Engineering Systems - Adaptive Hardwarel / Evolvable Hardware
Stochastic power/ground supply voltage prediction and optimization via analytical placement
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Packing Techniques for Virtex-5 FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Spare-cell-aware multilevel analytical placement
Proceedings of the 46th Annual Design Automation Conference
Analog layout generator for CMOS circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A rigorous framework for convergent net weighting schemes in timing-driven placement
Proceedings of the 2009 International Conference on Computer-Aided Design
Taming irregular EDA applications on GPUs
Proceedings of the 2009 International Conference on Computer-Aided Design
Parallel multi-level analytical global placement on graphics processing units
Proceedings of the 2009 International Conference on Computer-Aided Design
ITOP: integrating timing optimization within placement
Proceedings of the 19th international symposium on Physical design
Incremental solution of power grids using random walks
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Towards accelerating irregular EDA applications with GPUs
Integration, the VLSI Journal
Scalable hierarchical floorplanning for fast physical prototyping of systems-on-chip
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Multi-stage detailed placement algorithm for large-scale mixed-mode layout design
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and Its Applications - Volume Part IV
Progress and challenges in VLSI placement research
Proceedings of the International Conference on Computer-Aided Design
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We present a new force directed method for global placement. Besides the well-known wire length dependent forces we use additional forces to reduce cell overlaps and to consider the placement area. Compared to existing approaches, the main advantage is that the algorithm provides increased flexibility and enables a variety of demanding applications. Our algorithm is capable of addressing the problems of global placement, floorplanning, timing minimization and interaction to logic synthesis. Among the considered objective functions are area, timing, congestion and heat distribution. The iterative nature of the algorithm assures that timing requirements are precisely met. While showing similar CPU time requirements it outperforms Gordian by an average of 6 percent and TimberWolf by an average of 8 percent in wire length and yields significantly better timing results.