Generic global placement and floorplanning
DAC '98 Proceedings of the 35th annual Design Automation Conference
Routability driven white space allocation for fixed-die standard-cell placement
Proceedings of the 2002 international symposium on Physical design
Multilevel generalized force-directed method for circuit placement
Proceedings of the 2005 international symposium on Physical design
Routability-driven placement and white space allocation
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
mPL6: enhanced multilevel mixed-size placement
Proceedings of the 2006 international symposium on Physical design
A faster implementation of APlace
Proceedings of the 2006 international symposium on Physical design
A high-quality mixed-size analytical placer considering preplaced blocks and density constraints
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Fast and accurate routing demand estimation for efficient routability-driven placement
Proceedings of the conference on Design, automation and test in Europe
IPR: an integrated placement and routing algorithm
Proceedings of the 44th annual Design Automation Conference
FastRoute 2.0: A High-quality and Efficient Global Router
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
A new global router for modern designs
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Estimating routing congestion using probabilistic analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Congestion estimation during top-down placement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Implementation and extensibility of an analytic placer
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Seeing the Forest and the Trees: Steiner Wirelength Optimization in Placement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
CROP: fast and effective congestion refinement of placement
Proceedings of the 2009 International Conference on Computer-Aided Design
GRPlacer: improving routability and wire-length of global routing with circuit replacement
Proceedings of the 2009 International Conference on Computer-Aided Design
CRISP: congestion reduction by iterated spreading during placement
Proceedings of the 2009 International Conference on Computer-Aided Design
What makes a design difficult to route
Proceedings of the 19th international symposium on Physical design
Completing high-quality global routes
Proceedings of the 19th international symposium on Physical design
Cut-demand based routing resource allocation and consolidation for routability enhancement
Proceedings of the 16th Asia and South Pacific Design Automation Conference
A SimPLR method for routability-driven placement
Proceedings of the International Conference on Computer-Aided Design
Ripple: an effective routability-driven placer by iterative cell movement
Proceedings of the International Conference on Computer-Aided Design
Routability-driven analytical placement for mixed-size circuit designs
Proceedings of the International Conference on Computer-Aided Design
Design-hierarchy aware mixed-size placement for routability optimization
Proceedings of the International Conference on Computer-Aided Design
Scalable hierarchical floorplanning for fast physical prototyping of systems-on-chip
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Progress and challenges in VLSI placement research
Proceedings of the International Conference on Computer-Aided Design
SRP: simultaneous routing and placement for congestion refinement
Proceedings of the 2013 ACM international symposium on International symposium on physical design
Routability-driven placement for hierarchical mixed-size circuit designs
Proceedings of the 50th Annual Design Automation Conference
Ripple 2.0: high quality routability-driven placement via global router integration
Proceedings of the 50th Annual Design Automation Conference
Techniques for scalable and effective routability evaluation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Routability is a challenging cost metric for modern large-scale mixed-size placement. Most existing routability-driven placement algorithms apply whitespace allocation to relieve the routing congestion. Nevertheless, we observe that whitespace allocation might worsen the routability of a placement. To remedy this deficiency, we propose in this paper a new direction/technique, called net overlapping removal, to optimize the routability during placement. Unlike most previous works that allocate whitespace among blocks, our approach moves nets apart from congested regions to improve the chip routability. To apply the net overlapping removal technique, we generalize a net bounding-box based congestion evaluation model to handle practical routing constraints and speed up the routability optimization during placement. We further propose a Gaussian smoothing technique to handle the challenging macro porosity issue, arising in modern mixed-size designs with large macros that require to preserve routing resources for inner routing of the macros. Experimental results show that our approaches lead to significantly better routability and running time than previous works for mixed-size placement.