Ripple 2.0: high quality routability-driven placement via global router integration

Authors:
Xu He;Tao Huang;Wing-Kai Chow;Jian Kuang;Ka-Chun Lam;Wenzan Cai;Evangeline F. Y. Young
Affiliations:
The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong
Venue:
Proceedings of the 50th Annual Design Automation Conference
Year:
2013

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Abstract

Due to a significant mismatch between the objectives of wirelength and routing congestion, the routability issue is becoming more and more important in VLSI design. In this paper, we present a high quality placer Ripple 2.0 to solve the routability-driven placement problem. We will study how to make use of the routing path information in cell spreading and relieve congestion with tangled logic in detail. Several techniques are proposed, including (1) lookahead routing analysis with pin density consideration, (2) routing path-based cell inflation and spreading and (3) robust optimization on congested cluster. With the official evaluation protocol, Ripple 2.0 outperforms the top contestants on the ICCAD 2012 Contest benchmark suite.