Analytical placement: A linear or a quadratic objective function?
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
NRG: global and detailed placement
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Generic global placement and floorplanning
DAC '98 Proceedings of the 35th annual Design Automation Conference
Optimal partitioners and end-case placers for standard-cell layout
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Faster optimal single-row placement with fixed ordering
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Algorithms for detailed placement of standard cells
Proceedings of the conference on Design, automation and test in Europe
MMP: a novel placement algorithm for combined macro block and standard cell layout design
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Consistent placement of macro-blocks using floorplanning and standard-cell placement
Proceedings of the 2002 international symposium on Physical design
Mongrel: hybrid techniques for standard cell placement
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Almost optimum placement legalization by minimum cost flow and dynamic programming
Proceedings of the 2004 international symposium on Physical design
Proceedings of the 2004 international symposium on Physical design
Large-scale placement by grid-warping
Proceedings of the 41st annual Design Automation Conference
Multi-level placement for large-scale mixed-size IC designs
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
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Quadratic/Analytical placement methods have been widely used in the latest IC design process. This kind of placement needs a powerful detailed placement method for large-scale mixed macro and standard cell placement. An efficient and effective multi- stage iterative detailed placement (MSIP) algorithm is proposed in this paper. It combines a better initial placement based on combinatorial optimization method with a deterministic local search for post optimization. Various strategies are used for saving computation time. Experimental results show that it can get an average of 22% wire length improvement comparing to PAFLO [6] in comparable runtime.