Implementation of recursive search algorithms in reconfigurable hardware

  • Authors:
  • Iouliia Skliarova

  • Affiliations:
  • University of Aveiro, IEETA, Aveiro, Portugal

  • Venue:
  • WISICT '05 Proceedings of the 4th international symposium on Information and communication technologies
  • Year:
  • 2005

Quantified Score

Hi-index 0.00

Visualization

Abstract

By adapting to computations that are not so well supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. A great deal of research effort in this area is aimed at accelerating the solution of combinatorial optimization problems. However, hardware description languages (such as VHDL) as well as system-level specification languages (such as Handel-C) that are usually employed for specifying the required functionality of reconfigurable systems do not provide a direct support for recursion. In this paper a method allowing recursive algorithms to be easily described in Handel-C and implemented in an FPGA (field-programmable gate array) is proposed. The recursive search algorithm for the knapsack problem is considered as an example. The required hardware support is provided by a recursive hierarchical finite state machine model.