IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
The Universal Configurable Block/Machine—An Approach for a Configurable SoC-Architecture
The Journal of Supercomputing
Computer assisted source-code parallelisation
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part V
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Mechatronic systems most often require hard real-time behaviour of the controlling system. The standard solution for this kind of application is based on the time-triggered approach, and for certain circumstances the schedulability is provable. In contrast, this paper introduces an approach using some hardware enhancements that allow first to substitute the time-triggered system by an event-triggered system but conserving the reliability, second to enhance the event-triggered system by a two-level reaction system while conserving the hard real-time capabilities and third to combine tasks to improve even the worst-case behaviour. This results in a hard-time-but-weak-logic reaction system when computing time is tide but maintains full processing capabilities and therefore exact reaction values for all reactions whenever possible. This meets the goal of creating an event-triggered and reliable system approach. Combining two or more events to more than one combination will improve the theoretical schedulability of the system too, especially in the case when configurable computing elements are used.