A New Approach to Subquadratic Space Complexity Parallel Multipliers for Extended Binary Fields
IEEE Transactions on Computers
Comments on "Five, Six, and Seven-Term Karatsuba-Like Formulae"
IEEE Transactions on Computers
Multithreaded parallel implementation of arithmetic operations modulo a triangular set
Proceedings of the 2007 international workshop on Parallel symbolic computation
Montgomery Residue Representation Fault-Tolerant Computation in GF(2k)
ACISP '08 Proceedings of the 13th Australasian conference on Information Security and Privacy
High performance GHASH function for long messages
ACNS'10 Proceedings of the 8th international conference on Applied cryptography and network security
Square-rich fixed point polynomial evaluation on FPGAs
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
Hi-index | 0.01 |
Recent research has demonstrated the vulnerability of certain smart card architectures to power and electro-magnetic analysis when multiplier operations areinsufficiently shielded from external monitoring. Here several standard multipliers are investigated ...