Performance analysis of the Alpha 21264-based Compaq ES40 system
Proceedings of the 27th annual international symposium on Computer architecture
Predictive performance and scalability modeling of a large-scale application
Proceedings of the 2001 ACM/IEEE conference on Supercomputing
Spider: A High-Speed Network Interconnect
IEEE Micro
The Alpha 21364 Network Architecture
IEEE Micro
Low Level Architectural Characterization Benchmarks for ParallelComputers
Low Level Architectural Characterization Benchmarks for ParallelComputers
Computational forces in the SAGE benchmark
Journal of Parallel and Distributed Computing
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In this paper we detail the performance of a new Alpha-Server node containing 16 Alpha EV7 CPUs. The EV7 processor is based on the EV68 processor core that is used in terascale systems at Los Alamos National Laboratory and the Pittsburgh Supercomputing Center. The EV68 processor core is supplemented with six-way router circuitry that forms connections from the processor internals to four neighboring CPUs in a two-dimensional torus, to a I/O controller and to local memory. The performance evaluation presented in this paper considers memory hierarchy, intra-node MPI communication, and also the performance of a number of complete applications. The measurements are compared with those taken on existing AlphaServer machines. It is clear from our analysis that the superior application performance of the EV7 relative to a similarspeed EV68 is attributable to its excellent main memory bandwidth - over 4 GB/s.