Considering Run-Time Reconfiguration Overhead in Task Graph Transformations for Dynamically Reconfigurable Architectures

Authors:
Sudarshan Banerjee;Elaheh Bozorgzadeh;Nikil Dutt
Affiliations:
University of California at Irvine;University of California at Irvine;University of California at Irvine
Venue:
FCCM '05 Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Year:
2005

Citing 0
Cited 6

Mapping data-parallel tasks onto partially reconfigurable hybrid processor architectures

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Task scheduling with configuration prefetching and anti-fragmentation techniques on dynamically reconfigurable systems

Proceedings of the conference on Design, automation and test in Europe
Task graph scheduling for reconfigurable architectures driven by reconfigurations hiding and resources reuse

Proceedings of the 19th ACM Great Lakes symposium on VLSI
Partitioning and scheduling of task graphs on partially dynamically reconfigurable FPGAs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An ILP formulation for the task graph scheduling problem tailored to bi-dimensional reconfigurable architectures

International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
A Novel Puzzle Based Compaction (PBC) Strategy for Enhancing the Utilization of Reconfigurable Resources

International Journal of Applied Evolutionary Computation

Quantified Score

Hi-index	0.00

Visualization

Abstract

In modern dynamic FPGA-based platforms where multiple processes may be executing concurrently, partial dynamic reconfiguration (RTR) is a key technique for maximizing application performance under resource constraints. For platforms with columnbased partial RTR, we propose a new technique to statically transform linear task graphs (common in image processing applications). In our approach, the granularity of data parallelism for each task is determined while considering the reconfiguration overhead along with architectural constraints imposed by partial RTR. On JPEG applications, our technique can improve the execution time by upto 37% by choosing the right granularity of task parallelism.