Functionally Fault-tolerant DSP Microprocessor using Sigma---delta Modulated Signals
Journal of Electronic Testing: Theory and Applications
Fault Tolerance Analysis of Communication System Interleavers: the 802.11a Case Study
Journal of Signal Processing Systems
Subthreshold parallel FM-to-digital Δ-Σ converter with output-bit-stream addition by interleaving
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2008 custom integrated circuits conference (CICC 2008)
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As the transistor gate length goes straightforward to the sub-micron dimension, the possibilities of occurrence of external interferences in these devices also increase. Moreover, the process variability will further degrade this scenario. The direct effect of such external and/or intrinsic interferences is, in many cases, the total mismatch between the desired answer of the system and the achieved answer resulting from single bit flips. This way, new techniques must be studied in order to guarantee the correct operation of these systems. This work presents the use of a totally digital sigma-delta modulator that is used to develop arithmetic operations, which are further used to develop a FIR filter. Simulations results show that, even with the insertion of a large amount of faults, one can still obtain a non-faulty behavior in the SNR of complex application.