Viable opto-electronic HPC interconnect fabrics
SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
Performance of a speculative transmission scheme for scheduling-latency reduction
IEEE/ACM Transactions on Networking (TON)
Design and performance of speculative flow control for high-radix datacenter interconnect switches
Journal of Parallel and Distributed Computing
Obtaining the optimal configuration of high-radix Combined switches
Journal of Parallel and Distributed Computing
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Memory systems for conventional large-scale computers provide only limited bytes/s of data bandwidth when compared to their flop/s of instruction execution rate. The resulting bottleneck limits the bytes/flop that a processor may access from the full ...