Designing a Crossbar Scheduler for HPC Applications

Authors:
Cyriel Minkenberg;Francois Abel;Peter Muller;Raj Krishnamurthy;Mitchell Gusat;Peter Dill;Ilias Iliadis;Ronald Luijten;B. Roe Hemenway;Richard Grzybowski;Enrico Schiattarella
Affiliations:
IBM Zurich Research Laboratory;IBM Zurich Research Laboratory;IBM Zurich Research Laboratory;IBM Zurich Research Laboratory;IBM Zurich Research Laboratory;IBM Zurich Research Laboratory;IBM Zurich Research Laboratory;IBM Zurich Research Laboratory;Corning Inc.;Corning Inc.;Politecnico di Torino
Venue:
IEEE Micro
Year:
2006

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Abstract

A crucial part of any high-performance computing (HPC) system is its interconnection network. Corning and IBM are jointly developing a demonstration interconnect based on optical cell swtiching with electronic control. Key innovations in the scheduler architecture directly address the main HPC requirements: low latency, high throughput, efficient multicast suppot, and high reliability.