Robust Built-In Test of RF ICs Using Envelope Detectors

Authors:
Donghoon Han;Abhijit Chatterjee
Affiliations:
Georgia Institute of Technology, Atlanta, GA;Georgia Institute of Technology, Atlanta, GA
Venue:
ATS '05 Proceedings of the 14th Asian Test Symposium on Asian Test Symposium
Year:
2005

Citing 0
Cited 3

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Abstract

To address growing production test costs, a low-cost built-in test solution for RF circuits is proposed that is robust to Process, Supply Voltage and Temperature variations (PVT variations). The test solution consists of measuring the envelope of the output response to a twotone test stimulus. This is a relatively low frequency signal compared to the nominal frequency of the RF device under test (DUT) and can therefore be sampled using an on-chip ADC. The resulting test response waveform is analyzed using wavelet transforms. The corresponding wavelet coefficients are used to accurately predict the test specification values of the RF DUT in the presence of noise. The proposed test approach has been demonstrated for a 2.4GHz low noise amplifier designed in a 0.18um CMOS process and shows high prediction accuracy for the test specifications of the DUT in the presence of noise and PVT variations.