A New Low Power Test Pattern Generator using a Transition Monitoring Window based on BIST Architecture

  • Authors:
  • Youbean Kim;Myung-Hoon Yang;Yong Lee;Sungho Kang

  • Affiliations:
  • Yonsei University, Korea;Yonsei University, Korea;Yonsei University, Korea;Yonsei University, Korea

  • Venue:
  • ATS '05 Proceedings of the 14th Asian Test Symposium on Asian Test Symposium
  • Year:
  • 2005

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Abstract

This paper presents a new low power BIST TPG scheme. It uses a transition monitoring window (TMW) that is comprised of a transition monitoring window block and a MUX. When random test patterns are generated by an LFSR, transitions of those patterns satisfy pseudo-random Gaussian distribution. The proposed technique represses transitions of patterns using the k-value which is a standard that is obtained from the distribution of TMW to observe over transitive patterns causing high power dissipation in a scan chain. Experimental results show that the proposed BIST TPG schemes can reduce scan transition by about 60% without performance loss in ISCAS'89 benchmark circuits that have large number scan inputs.