Thermal Modeling, Characterization and Management of On-Chip Networks
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Temperature-Aware On-Chip Networks
IEEE Micro
Adapting application execution in CMPs using helper threads
Journal of Parallel and Distributed Computing
Outline of RISC-based core for multiprocessor on chip architecture supporting moving threads
CompSysTech '09 Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing
Brief announcement: flashcrowding in tiled multiprocessors under thermal constraints
Proceedings of the twenty-second annual ACM symposium on Parallelism in algorithms and architectures
Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
EURASIP Journal on Embedded Systems
A moving threads processor architecture MTPA
The Journal of Supercomputing
Deadlock-free fine-grained thread migration
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Using task migration to improve non-contiguous processor allocation in NoC-based CMPs
Journal of Systems Architecture: the EUROMICRO Journal
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Global communication costs in future single-chipmultiprocessors will increase linearly with distance. In this paper,we revisit the issues of locality and load balance in order totake advantage of these new costs. We present a technique whichsimultaneously migrates data and threads based on vectors specifyinglocality and resource usage. This technique improves performanceon applications with distinguishable locality and imbalancedresource usage. 64% of the ideal reduction in execution timewas achieved on an application with these traits while no improvementwas obtained on a balanced application with little locality.