DAC '98 Proceedings of the 35th annual Design Automation Conference
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Orion: a power-performance simulator for interconnection networks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Exploiting ILP, TLP, and DLP with the polymorphous TRIPS architecture
Proceedings of the 30th annual international symposium on Computer architecture
Exploiting Structural Duplication for Lifetime Reliability Enhancement
Proceedings of the 32nd annual international symposium on Computer Architecture
Migration in Single Chip Multiprocessors
IEEE Computer Architecture Letters
The StageNet fabric for constructing resilient multicore systems
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
NTPT: on the end-to-end traffic prediction in the on-chip networks
Proceedings of the 47th Design Automation Conference
A thermal-aware application specific routing algorithm for network-on-chip design
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Sustainable multi-core architecture with on-chip wireless links
Proceedings of the great lakes symposium on VLSI
Energy-efficient multicore chip design through cross-layer approach
Proceedings of the Conference on Design, Automation and Test in Europe
Augmented materials: spatially embodied sensor networks
International Journal of Communication Networks and Distributed Systems
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On-chip networks are becoming increasingly popular as a way to connect high-performance single-chip computer systems, but thermal issues greatly limit network design. This thermal modeling and simulation framework combines with a distributed runtime scheme for thermal management to offer a path to thermally efficient on-chip network design.