ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Detailed characterization of transceiver parameters through loop-back-based BiST
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Built-in loopback test for IC RF transceivers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Wafer-level defect screening for "big-D/small-A" mixed-signal SoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We present an automatic test development methodology for FM transceivers based on frequency-domain signature analysis and delayed-RF set up. We develop two distinct pass/fail criteria based on eigensignatures and envelope signatures and a test generation algorithm that aims at minimizing the required delay while attaining full coverage of target faults. We develop a fault injection and simulation platform for a VCO-modulation, low-IF transceiver architecture using MATLAB and behavioral models including non-ideal response. The proposed methodology enables the automation of the test generation process, thus reduces the test development time. Experimental results have shown a 90% reduction in the required delay thereby reducing the cost of this test hardware item.