Digital communications
RF microelectronics
A Bulti-in Self-Test Strategy for Wireless Communication Systems
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Industrial Relevance of Analog IFA: A Fact or a Fiction
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Realistic-Faults Mapping Scheme for the Fault Simulation of Integrated Analogue CMOS Circuits
Proceedings of the IEEE International Test Conference on Test and Design Validity
Defect-oriented testing of mixed-signal ICs: some industrial experience
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Architecting Millisecond Test Solutions for Wireless Phone RFIC's
ITC '02 Proceedings of the 2002 IEEE International Test Conference
BiST Model for IC RF-Transceiver Front-End
DFT '03 Proceedings of the 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
A View from the Bottom: Nanometer Technology AC Parametric Failures " Why, Where, and How to Detect
DFT '03 Proceedings of the 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Production Testing of Rf and System-On-A-Chip Devices for Wireless Communications (Artech House Microwave Library)
RF-BIST: Loopback Spectral Signature Analysis
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Mixed Loopback BiST for RF Digital Transceivers
DFT '04 Proceedings of the Defect and Fault Tolerance in VLSI Systems, 19th IEEE International Symposium
A System-Level Alternate Test Approach for Specification Test of RF Transceivers in Loopback Mode
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Low-cost Production Test of BER for Wireless Receivers
ATS '05 Proceedings of the 14th Asian Test Symposium on Asian Test Symposium
Delayed-RF Based Test Development for FM Transceivers Using Signature Analysis
ITC '04 Proceedings of the International Test Conference on International Test Conference
VTS '06 Proceedings of the 24th IEEE VLSI Test Symposium
RF Front-end System Gain and Linearity Built-in Test
VTS '06 Proceedings of the 24th IEEE VLSI Test Symposium
On-Chip Testing Techniques for RF Wireless Transceivers
IEEE Design & Test
CMOS blocks for on-chip RF test
Analog Integrated Circuits and Signal Processing
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits (Frontiers in Electronic Testing)
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits (Frontiers in Electronic Testing)
Interactive presentation: Boosting SER test for RF transceivers by simple DSP technique
Proceedings of the conference on Design, automation and test in Europe
IEEE Communications Magazine
Closing the gap between analog and digital testing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Journal of Electronic Testing: Theory and Applications
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The essentials of the on-chip loopback test for integrated RF transceivers are presented. The available on-chip baseband processor serves as a tester while the RF front-end is under test enabled by on-chip test attenuator and in some cases by an offset mixer, too. Various system-level tests, like bit error rate, error vector magnitude, or spectral measurements are discussed. By using this technique in mass production, the RF test equipment can be largely avoided and the test cost reduced. Different variants of the loopback setup including the bypassing technique and RF detectors to boost the chip testability are considered. The existing limitations and tradeoffs are discussed in terms of test feasibility, controllability, and observability versus the chip performance. The fault-oriented approach supported by sensitization technique is put in contrast to the functional test. Also the impact of production tolerances is addressed in terms of a simple statistical model and the detectability thresholds. This paper is based on the present and previous work of the authors, largely revised and upgraded to provide a comprehensive description of the on-chip loopback test. Simulation examples of practical communication transceivers such as WLAN and EDGE under test are also included.