On-chip transient current monitor for testing of low-voltage CMOS IC
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A System-Level Alternate Test Approach for Specification Test of RF Transceivers in Loopback Mode
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Evaluation of Signature-Based Testing of RF/Analog Circuits
ETS '05 Proceedings of the 10th IEEE European Symposium on Test
On-Chip Spectrum Analyzer for Analog Built-In Self Test
VTS '05 Proceedings of the 23rd IEEE Symposium on VLSI Test
Use of Embedded Sensors for Built-In-Test of RF Circuits
ITC '04 Proceedings of the International Test Conference on International Test Conference
VTS '06 Proceedings of the 24th IEEE VLSI Test Symposium
RF Front-end System Gain and Linearity Built-in Test
VTS '06 Proceedings of the 24th IEEE VLSI Test Symposium
An improved RF loopback for test time reduction
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Design for Manufacturability and Yield for Nano-Scale CMOS
Design for Manufacturability and Yield for Nano-Scale CMOS
A Robust 130 nm-CMOS Built-In Current Sensor Dedicated to RF Applications
Journal of Electronic Testing: Theory and Applications
An on-chip loopback block for RF transceiver built-in test
IEEE Transactions on Circuits and Systems II: Express Briefs
Spectral Prediction for Specification-Based Loopback Test of Embedded Mixed-Signal Circuits
Journal of Electronic Testing: Theory and Applications
Built-in loopback test for IC RF transceivers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Making complex mixed-signal telecommunication integrated circuits testable
IEEE Communications Magazine
Wide Dynamic Range CMOS Amplifier Design for RF Signal Power Detection via Electro-Thermal Coupling
Journal of Electronic Testing: Theory and Applications
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Built-in test and on-chip calibration features are becoming essential for reliable wireless connectivity of next generation devices suffering from increasing process variations in CMOS technologies. This paper contains an overview of contemporary self-test and performance enhancement strategies for single-chip transceivers. In general, a trend has emerged to combine several techniques involving process variability monitoring, digital calibration, and tuning of analog circuits. Special attention is directed towards the investigation of temperature as an observable for process variations, given that thermal coupling through the silicon substrate has recently been demonstrated as mechanism to monitor the performances of analog circuits. Both Monte Carlo simulations and experimental results are presented in this paper to show that circuit-level specifications exhibit correlations with silicon surface temperature changes. Since temperature changes can be measured with efficient on-chip differential temperature sensors, a conceptual outline is given for the use of temperature sensors as alternative process variation monitors.