RF Front-end System Gain and Linearity Built-in Test

  • Authors:
  • Qi Wang;Mani Soma

  • Affiliations:
  • University of Washington;University of Washington

  • Venue:
  • VTS '06 Proceedings of the 24th IEEE VLSI Test Symposium
  • Year:
  • 2006

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Abstract

This work addresses the concurrent on-chip measurement of the gain, the input 1-dB compression point (ICP1-dB), and the input-referred third-order interference point (IIP3) of individual RF building blocks in RF front-end systems, using introduced high speed CMOS RF on-chip amplitude detectors, which work up to 20 GHz with high accuracy, small area, and low power consumption.