Design for Manufacturability and Yield for Nano-Scale CMOS

Reap what you sow: spare cells for post-silicon metal fix

Proceedings of the 2008 international symposium on Physical design

Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation

Proceedings of the 2008 Asia and South Pacific Design Automation Conference

Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method

Proceedings of the 2009 Asia and South Pacific Design Automation Conference

The road to 3D EDA tool readiness

Proceedings of the 2009 Asia and South Pacific Design Automation Conference

Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Minimizing leakage power of sequential circuits through mixed-Vt flip-flops and multi-Vt combinational gates

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Retiming and time borrowing: optimizing high-performance pulsed-latch-based circuits

Proceedings of the 2009 International Conference on Computer-Aided Design

Statistical analysis of large on-chip power grid networks by variational reduction scheme

Integration, the VLSI Journal

Crosstalk-induced delay, noise, and interconnect planarization implications of fill metal in nanoscale process technology

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Digital statistical analysis using VHDL: impact of variations on timing and power using gate-level Monte Carlo simulation

Proceedings of the Conference on Design, Automation and Test in Europe

Survey of Robustness Enhancement Techniques for Wireless Systems-on-a-Chip and Study of Temperature as Observable for Process Variations

Journal of Electronic Testing: Theory and Applications

Statistical extraction and modeling of inductance considering spatial correlation

Analog Integrated Circuits and Signal Processing

Overall Wafer Effectiveness (OWE): A novel industry standard for semiconductor ecosystem as a whole

Computers and Industrial Engineering