Power macromodeling for high level power estimation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Power modeling for high-level power estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interconnect-Driven Short-Circuit Power Modeling
DSD '01 Proceedings of the Euromicro Symposium on Digital Systems Design
Analysis and future trend of short-circuit power
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hi-index | 0.00 |
Traditionally, RTL power estimation techniques are characterizing a component for a fixed environment (most importantly load capacitance, activity, and operating frequency). This article presents a solution to problems originating from the ineluctably changing operating conditions such as differing load capacitance due to different applications; different activity and operating frequency as power reduction techniques are more frequently employed.