A fast mutual exclusion algorithm
ACM Transactions on Computer Systems (TOCS)
Real-time symbolic model checking for discrete time models
Theories and experiences for real-time system development
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
CTL model checking based on forward state traversal
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Forward model checking techniques oriented to buggy designs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Proof, language, and interaction
TACAs '96 Proceedings of the Second International Workshop on Tools and Algorithms for Construction and Analysis of Systems
A Verified Hardware Synthesis of Esterel Programs
DIPES '00 Proceedings of the IFIP WG10.3/WG10.4/WG10.5 International Workshop on Distributed and Parallel Embedded Systems: Architecture and Design of Distributed Embedded Systems
The Murphi Verification System
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Symbolic Model Checking of Real-Time Systems
TIME '01 Proceedings of the Eighth International Symposium on Temporal Representation and Reasoning (TIME'01)
From Pre-Historic to Post-Modern Symbolic Model Checking
Formal Methods in System Design
Specification, Modelling, Verification and Runtime Analysis of Real Time Systems
Specification, Modelling, Verification and Runtime Analysis of Real Time Systems
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Synchronous languages are widely used in industrial applications for the design and implementation of real-time embedded and reactive systems and are also well-suited for real-time verification purposes, since they have clean formal semantics. In this paper we focuse on the real-time temporal logic JCTL, which can directly support the real-time formal verification of synchronous programs for the design of systems in earlier (high-level) as well as in later (low-level) design stages, creating a bridging between industrial real-time descriptions and formal real-time verification. We extend the model-checking capabilities of JCTL, by introducing new forward symbolic model-checking techniques, allowing JCTL to benefit from both, forward-, as well as traditional backward state traversal methods and of course, their combination.