Platform-Based MPEG-4 SOC Design for Video Communications

Authors:
Yung-Chi Chang;Wei-Min Chao;Chih-Wei Hsu;Liang-Gee Chen
Affiliations:
DSP/IC Design Lab, Department of Electrical Engineering and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, R.O.C.;DSP/IC Design Lab, Department of Electrical Engineering and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, R.O.C.;DSP/IC Design Lab, Department of Electrical Engineering and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, R.O.C.;DSP/IC Design Lab, Department of Electrical Engineering and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, R.O.C.
Venue:
Journal of VLSI Signal Processing Systems
Year:
2006

Citing 4
Cited 1

Algorithms, Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation

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Abstract

An MPEG-4 video coding SOC design is presented in this paper. We adopt platform-based architecture with an embedded RISC core and efficient memory organization. A motion estimator supporting predictive diamond search and spiral full search is implemented for compromise between compression performance and design cost. The proposed data reuse scheme reduces required memory access bandwidth. For texture coding path, an interleaving DCT/IDCT scheduling with substructure sharing technique is proposed. Several key modules are integrated into an efficient platform in hardware/software co-design fashion. The cost-efficient video encoder SOC consumes 256.8 mW at 40 MHz and achieves real-time encoding of 30 CIF (352脳288) frames per second.