Pareto-optimal hardware for digital circuits using SPEA
IEA/AIE'2005 Proceedings of the 18th international conference on Innovations in Applied Artificial Intelligence
Intrinsic evolution of digital circuits using evolutionary algorithms
Proceedings of the first ACM/SIGEVO Summit on Genetic and Evolutionary Computation
Adaptive immune genetic algorithm for logic circuit design
Proceedings of the first ACM/SIGEVO Summit on Genetic and Evolutionary Computation
Expert Systems with Applications: An International Journal
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In this paper, we study two different circuit encoding used for digital circuit evolution. The first approach is based on genetic programming, wherein digital circuits consist of their data flow based specifications. In this approach, individuals are internally represented by the abstract trees of the corresponding circuit specifications. In the second approach, digital circuits are thought of as a map of rooted gates. So individuals are represented by two-dimensional arrays of cells. Each of these cells consists of the logic gate name together with the corresponding input signal names. Furthermore, we compare the impact of both individual representations on the evolution process of digital circuits. Evolved circuits should minimise space. We show that for the same input/output behaviour, employing both approaches yield circuits of almost the same characteristics in terms of space. However, the evolution process is much shorter with the second encoding.