Decoding of Reed Solomon codes beyond the error-correction bound
Journal of Complexity
Fast factorization architecture in soft-decision Reed-Solomon decoding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Improved decoding of Reed-Solomon and algebraic-geometry codes
IEEE Transactions on Information Theory
Efficient decoding of Reed-Solomon codes beyond half the minimum distance
IEEE Transactions on Information Theory
Algebraic soft-decision decoding of Reed-Solomon codes
IEEE Transactions on Information Theory
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Reed-Solomon (RS) codes have very broad applications in communications and data storage systems. The recently developed Koetter-Vardy (KV) soft-decision decoding algorithm of RS codes can achieve substantial coding gain, while has a complexity polynomial with respect to the codeword length. One of the major steps of the KV algorithm is the factorization step. A prediction-based architecture is developed in prior efforts to reduce the latency and silicon area of this step. However, the speedup can be achieved by this approach is limited by the serial nature of the factorization algorithm. The computations involved in multiple iteration levels can not be carried out simultaneously. In this work, a novel partial parallel architecture is proposed for the factorization step. The partial 2-parallel architecture can achieve a speedup of 19% over prior works.