A Fully Pipelined Systolic Array for Sinusoidal Sequence Generation

  • Authors:
  • Nuha A. S. Alwan

  • Affiliations:
  • IEEE

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 2006

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Abstract

A sinusoidal sequence is to be generated for the purposes of offline technical computing for system simulation and design in which speed is a crucial issue. Sine and cosine series are derived from the Maclaurin series for exponential functions. A digital frequency is specified and a sine sequence is generated, sample by sample, by computing the truncated series using a completely pipelined systolic array. The sine sequence is generated in a considerably shorter time than that generated by a Von Neumann machine. The generation rate and throughput of the systolic parallel system improve by the number of terms used in the truncated series when compared to serial processing. The generated sequence finds application in offline technical computing for the design, simulation, and testing of digital filters and other digital signal processing systems. The systolic computation under consideration need not be confined to application-specific architectures, but, rather, it may be programmed. Since it is fully pipelined, the array conforms to architectures of both pipelined and systolic programmable parallel processors.