A Unified Design Space for Regular Parallel Prefix Adders
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI
IBM Journal of Research and Development
CASL: A rapid-prototyping language for modern micro-architectures
Computer Languages, Systems and Structures
SAMS multi-layout memory: providing multiple views of data to boost SIMD performance
Proceedings of the 24th ACM International Conference on Supercomputing
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A Vector Fixed Point Unit (FXU) is designed to speed up multi-media processing. The FXU implements SIMD style integer arithmetic and permute operations. The adder, rotator and permute structure enables the use of static circuits only. The FXU was fabricated using IBM 90nm CMOS SOI technology.