Dynamic Voltage Scaling Aware Delay Fault Testing

  • Authors:
  • Noohul Basheer Zain Ali;Mark Zwolinski;Bashir M. Al-Hashimi;Peter Harrod

  • Affiliations:
  • University of Southampton, UK;University of Southampton, UK;University of Southampton, UK;ARM. Ltd.

  • Venue:
  • ETS '06 Proceedings of the Eleventh IEEE European Test Symposium
  • Year:
  • 2006

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Abstract

The application of Dynamic Voltage Scaling (DVS) to reduce energy consumption may have a detrimental impact on the quality of manufacturing tests employed to detect permanent faults. This paper analyses the influence of different voltage/frequency settings on fault detection within a DVS application. In particular, the effect of supply voltage on different types of delay faults is considered. This paper presents a study of these problems with simulation results. We have demonstrated that the test application time increases as we reduce the test voltage. We have also shown that for newer technologies we do not have to go to very low voltage levels for delay fault testing. We conclude that it is necessary to test at more than one operating voltage and that the lowest operating voltage does not necessarily give the best fault cover.