On testing timing-speculative circuits

Authors:
Feng Yuan;Yannan Liu;Wen-Ben Jone;Qiang Xu
Affiliations:
The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong;University of Cincinnati;The Chinese University of Hong Kong, Shatin, N.T., Hong Kong
Venue:
Proceedings of the 50th Annual Design Automation Conference
Year:
2013

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Abstract

By allowing the occurrence of infrequent timing errors and correcting them online, circuit-level timing speculation is one of the most promising variation-tolerant design techniques. How to effectively test timing-speculative circuits, however, has not been addressed in the literature. This is a challenging problem because conventional scan techniques cannot provide sufficient controllability and observability for such circuits. In this paper, we propose novel techniques to achieve high fault coverage for timing-speculative circuits without incurring high design-for-testability cost. Experimental results on various benchmark circuits demonstrate the effectiveness of the proposed solution.