"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC

Authors:
V. Kerzerho;P. Cauvet;S. Bernard;F. Azais;M. Comte;M. Renovell
Affiliations:
University of Montpellier, France;Philips France Semiconducteurs, France;University of Montpellier, France;University of Montpellier, France;University of Montpellier, France;University of Montpellier, France
Venue:
ETS '06 Proceedings of the Eleventh IEEE European Test Symposium
Year:
2006

Citing 0
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Abstract

Most scan based designs implement the scan enable as a slow speed global control signal, and can therefore only implement launch-on-capture (LOC) delay tests. Launch-onshift (LOS) tests are generally more effective, achieving higher fault coverage with ...