DATE '99 Proceedings of the conference on Design, automation and test in Europe
The Verilog PLI Handbook
Validation in a component-based design flow for multicore SoCs
Proceedings of the 15th international symposium on System Synthesis
Virtual Simulation of Distributed IP-Based Designs
IEEE Design & Test
DESIGN: How .NET's Custom Attributes Affect Design
IEEE Software
The Evolution of SystemVerilog
IEEE Design & Test
ESys.Net: a new solution for embedded systems modeling and simulation
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the 34th conference on Winter simulation: exploring new frontiers
Leveraging Model Representations for System Level Design Tools
RSP '05 Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping
A computational reflection mechanism to support platform debugging in SystemC
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Introspection mechanisms for runtime verification in a system-level design environment
Microelectronics Journal
Concept-based partitioning for large multidomain multifunctional embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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New sophisticated EDA tools and methodologies will be needed to make products viable in the future marketplace by simplifying the various design stages. These tools will permit system design at a high abstraction level and enable automatic refinement through several abstraction levels to obtain a final prototype. They will have to be based on representations that are clean, complete, and easy to manipulate. In order to develop these new EDA tools, key features such as standardization, metadata programming, reflectivity, and introspection are needed. This work proposes a .Net Framework-based methodology, which possesses all these required key features. This methodology simplifies specification, synthesis, and validation of systems and enables the efficient creation/customization of EDA tools at low cost and development time. We show the effectiveness of this methodology by presenting its application for the design of a new EDA tool called ESys .Net (Embedded System design with .Net). We emphasize the specification and simulation aspects of this tool.