Supercompilers for parallel and vector computers
Supercompilers for parallel and vector computers
Efficient and exact data dependence analysis
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
A general algorithm for data dependence analysis
ICS '92 Proceedings of the 6th international conference on Supercomputing
Evolutionary algorithms in theory and practice: evolution strategies, evolutionary programming, genetic algorithms
Improving data locality with loop transformations
ACM Transactions on Programming Languages and Systems (TOPLAS)
Augmenting Loop Tiling with Data Alignment for Improved Cache Performance
IEEE Transactions on Computers - Special issue on cache memory and related problems
Tiling optimizations for 3D scientific computations
Proceedings of the 2000 ACM/IEEE conference on Supercomputing
Exploiting non-uniform reuse for cache optimization
Proceedings of the 2001 ACM symposium on Applied computing
Loop optimization for a class of memory-constrained computations
ICS '01 Proceedings of the 15th international conference on Supercomputing
Optimizing compilers for modern architectures: a dependence-based approach
Optimizing compilers for modern architectures: a dependence-based approach
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms
Scheduling and Automatic Parallelization
Scheduling and Automatic Parallelization
Automatic Partitioning of Parallel Loops with Parallelepiped-Shaped Tiles
IEEE Transactions on Parallel and Distributed Systems
On Time Optimal Supernode Shape
IEEE Transactions on Parallel and Distributed Systems
Better tiling and array contraction for compiling scientific programs
Proceedings of the 2002 ACM/IEEE conference on Supercomputing
On the Parallel Execution Time of Tiled Loops
IEEE Transactions on Parallel and Distributed Systems
Combined Selection of Tile Sizes and Unroll Factors Using Iterative Compilation
PACT '00 Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques
A Technique for Variable Dependence Driven Loop Peeling
ICA3PP '02 Proceedings of the Fifth International Conference on Algorithms and Architectures for Parallel Processing
Pharos: a scalable distributed architecture for locating heterogeneous information sources
Pharos: a scalable distributed architecture for locating heterogeneous information sources
A Quantitative Analysis of Tile Size Selection Algorithms
The Journal of Supercomputing
An analytical model for loop tiling and its solution
ISPASS '00 Proceedings of the 2000 IEEE International Symposium on Performance Analysis of Systems and Software
Parallel loop generation and scheduling
The Journal of Supercomputing
Automatic creation of tile size selection models
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
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Tiling is a known problem especially in the field of computational geometry and its related engineering branches. In fact, a tile is a set of points in the Cartesian space. The goal is to partition the space of the points as tiles with optimal dimensions and shapes such that a number of predefined semantic relations holds amongst the tiles. So far, this problem has been solved in special cases with two or three dimensions. The problem of determining the optimal tile is an NP-Hard problem. Presenting a novel constraint genetic algorithm in this paper, we have been able to solve the tiling problem in Cartesian spaces with more than two dimensions, for the loop parallelization problem.