Journal of Electronic Testing: Theory and Applications
Computers and Electrical Engineering
Graceful deadlock-free fault-tolerant routing algorithm for 3D Network-on-Chip architectures
Journal of Parallel and Distributed Computing
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Commercial designs are currently integrating from 10 to 100 embedded functional and storage blocks in a single SoC and the number is likely to increase significantly in the near future. With this ever increasing degree of integration, design of communication architectures for big SoCs is a challenge. The communication requirements of these large Multi Processor SoCs (MP-SoCs) are convened by the emerging network-on-a-chip (NoC) paradigm. The basic operations of NoC infrastructures are governed by on-chip packet-switched networks. Crosstalk between adjacent wires is an issue in NoC communication fabrics and it can cause timing violations and extra power dissipation. Crosstalk avoidance codes (CACs) can be used to improve signal integrity and also reduce the coupling capacitance and hence the energy dissipation of a wire segment. By incorporating Crosstalk Avoidance Coding (CAC) in NoC data streams we are able to reduce communication energy, which will help to decrease the energy dissipation as a whole.