A novel VLSI architecture for multidimensional discrete wavelet transform

Authors:
Xinjian Chen;Qionghai Dai
Affiliations:
Dept. of Autom., Tsinghua Univ., Beijing, China;Dept. of Autom., Tsinghua Univ., Beijing, China
Venue:
ICME '03 Proceedings of the 2003 International Conference on Multimedia and Expo - Volume 2
Year:
2003

Citing 6
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Abstract

In this short paper we propose a novel VLSI architecture for multidimensional discrete wavelet transform (m-D DWT) based on systolic array and non-separable approach. The proposed architecture performs a decomposition of an N/sub 1/ /spl times/ N/sub 2/ /spl times/ ... /spl times/ N/sub m/ image in about N/sub 1/ N/sub 2/...N/sub m//(2/sup m/ $1) clock cycles (ccs). This result considerably speeds up other known architectures. Besides, the advantages of the proposed architecture include very simple hardware complexity, regular data flow and low control complexity.