Efficient K-Means VLSI Architecture for Vector Quantization
SCIA '09 Proceedings of the 16th Scandinavian Conference on Image Analysis
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
High speed c-means clustering in reconfigurable hardware
Microprocessors & Microsystems
Bandwidth adaptive hardware architecture of K-Means clustering for video analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
K-means clustering algorithm for multimedia applications with flexible HW/SW co-design
Journal of Systems Architecture: the EUROMICRO Journal
An analog on-line-learning K-means processor employing fully parallel self-converging circuitry
Analog Integrated Circuits and Signal Processing
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K-means clustering is a very popular clustering technique, which is used in numerous applications. However, clustering is a time consuming task, particularly for large dataset, and large number of clusters. In this paper, we show that real-time k-means clustering can be realized for large size color images (24-bit full color RGB) and large number of clusters (up to 256) using an off-the-shelf FPGA (Field Programmable Gate Arrays) board. In our current implementation with one FPGA, the performance for 512 脳 512 and 640 脳 480 pixel images is more than 30 fps, and 20 - 30 fps for 756 脳 512 pixel images in average when dividing to 256 clusters.