Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Coherency for multiprocessor virtual address caches
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
MIPS RISC architecture
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
High-speed microprocessor design with gallium arsenide very large scale integrated digital circuits
High-speed microprocessor design with gallium arsenide very large scale integrated digital circuits
Analysis of Cache Performance for Operating Systems and Multiprogramming
Analysis of Cache Performance for Operating Systems and Multiprogramming
Implementing a cache for a high-performance GaAs microprocessor
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Delayed consistency and its effects on the miss rate of parallel programs
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
Performance optimization of pipelined primary cache
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Delay macromodels for the timing analysis of GaAs DCFL
EURO-DAC '92 Proceedings of the conference on European design automation
Efficient simulation of caches under optimal replacement with applications to miss characterization
SIGMETRICS '93 Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Finding representative workloads for computer system design
Finding representative workloads for computer system design
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A description is given of work to develop a prototype microcomputer that will realize the best of both the supercomputer and the microprocessor traditions. It does so by using GaAs MESFET enhancement/depletion direct-coupled FET logic, a high-speed technology that has good integration density, and state-of-the-art packaging technology to prevent chip crossings from dominating the overall speed of the system. The focus of the research reported is the relationship between hardware implementations and emerging technologies. The MIPS Computer Systems instruction set was implemented to bound the architectural options and to eliminate the need to develop compilers and operating systems. Efforts are concentrated on developing the processor and cache. The resulting system will be a general-purpose computer that runs a conventional Unix environment and supports standard programming languages and networking protocols. The machine will significantly accelerate execution of the existing large base of application software.