Analysis of dual-Vt SRAM cells with full-swing single-ended bit line sensing for on-chip cache
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2003 international symposium on Low power electronics and design
Temperature Variable Supply Voltage for Power Reduction
ISVLSI '02 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
NBTI resilient circuits using adaptive body biasing
Proceedings of the 18th ACM Great Lakes symposium on VLSI
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Due to continuously increasing active power dissipation die temperatures exhibit significant spatial and temporal variability. Targeting the worst-case temperature is not optimal as performance will be lost for non-worst cases. This paper proposes a temperature-adaptive body bias technique that can dynamically recover this lost performance. Two applications are described that demonstrate the effectiveness of proposed technique.