Six Synthesis Methods for Reversible Logic

  • Authors:
  • Yvan Van Rentergem;Alexis De Vos;Koen De Keyser

  • Affiliations:
  • Vakgroep elektronika en informatiesystemen and Imec v.z.w., Universiteit Gent, Gent, Belgium B-9000;Vakgroep elektronika en informatiesystemen and Imec v.z.w., Universiteit Gent, Gent, Belgium B-9000;Vakgroep elektronika en informatiesystemen and Imec v.z.w., Universiteit Gent, Gent, Belgium B-9000

  • Venue:
  • Open Systems & Information Dynamics
  • Year:
  • 2007

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Abstract

The (2 w )! reversible transformations on w wires, i.e. reversible logic circuits with w inputs and w outputs, together with the action of cascading, form a group, isomorphic to the symmetric group S 2 w . Therefore, we investigate the group S n as well as one of its subgroups isomorphic to S n/2 脳 S n/2. We then consider the left cosets, the right cosets, and the double cosets generated by the subgroup. Each element of a coset can function as the representative of the coset. The coset can then be considered as the set of all group elements that differ from the representative by merely multiplying (either to the left or to the right or to both sides) by an arbitrary element of the subgroup. Different choices of the coset space and different choices of the coset representatives lead to six different syntheses for implementing an arbitrary reversible logic operation into hardware. Evaluation of all six methods, by means of three different cost functions (gate cost, switch cost, and quantum cost), leads to a best choice.